Brief Summary of research: 

One of my main research fields is the exploration of reliability challenges in advanced semiconductor process nodes. The shrinking dimensions of advanced semiconductor process nodes to nanometric scales introduce significant reliability challenges related to the aging of integrated circuits. This aging process results not only in performance degradation but also in incorrect functionality over the lifetime of the circuits. In my research, I focus on transistor aging, which represents the physical deterioration process that occurs over a transistor's lifetime. Two physical mechanisms govern transistor aging: Hot Carrier Injection (HCI) and Bias Temperature Instability (BTI). HCI occurs when high kinetic energy carriers flow through a transistor, whereas BTI occurs when a static voltage (logical state) is applied to the gate of a transistor without current flow for an extended period, typically ranging from tens of seconds to several weeks. Both BTI and HCI increase the transistor threshold voltage, which in turn increases the switching delay. As part of my research, I have introduced new micro-architectural and physical design flow solutions to mitigate these challenging phenomena. The mitigation techniques are based on a preventive maintenance approach that monitors chip degradation over its lifetime and activates preventive measures when necessary. 

Specific research topics related to Nanoscience and Nanotechnology:

Looking ahead, I plan to utilize the Nano center's state-of-the-art equipment to further investigate the nanoscale phenomena impacting transistor aging and devise innovative solutions to enhance the reliability of semiconductor devices. Access to advanced characterization tools and fabrication facilities at the Nano center will enable me to conduct precise experiments and validate my theoretical models, ensuring that my research remains at the forefront of technological advancement. My involvement with the Nano community is important, as it fosters interdisciplinary collaboration and knowledge exchange, which are essential for addressing the complex challenges in semiconductor reliability and driving progress in the field.